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Training session for Intel MIC users at IFERC-CSC on 2015-01-27

Since MIC processors differ significantly from conventional (Xeon) processors, users sending an expression of interest should have some experience of programming MIC processors or should attend one training session organized by the CSC.

Registration for the fourth European training session, which will take place on January 27-28, 2015, is handled by IPP in Garching (Germany). If you are interested in participating in this training course, please contact Ms. Anneliese Grasmann with copy to Jacques David and Roman Hatzky no later than Monday 2015-01-19.